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高性能低成本衡器的參考設計英文(pdf 6頁)

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高性能低成本衡器的參考設計英文(pdf 6頁)內容簡介
By Colm Slattery [colm.slattery@analog.com]
Mariah Nie [mariah.nie@analog.com]
INTRODUCTION
The trend in weigh scales towards higher accuracy and lower cost
has produced an increased demand for high-performance analog
signal processing at low cost. The scope of this requirement is
not obvious; most weigh scales output the final weight value at a
resolution of 1:3,000 or 1:10,000, which is easily met (apparently)
by a 12-bit to 14-bit ADC (analog-to-digital converter). However, a
closer examination of weigh scales shows that meeting the resolution
requirement is not that easily accomplished; in fact, the ADC
accuracy needs to be closer to 20 bits. In this article, we discuss
some of the system specifications of weigh scales and deal with
considerations for designing and building a weigh-scale system.
The main areas considered are peak-to-peak-noise resolution,
A/D-converter dynamic range, gain drift, and filtering. We
compare measured data from a real load cell to inputs from a
stable voltage reference, using a weigh-scale reference design as
an evaluation board.
Load-Cell Sensor
The most common weigh-scale implementation is to use a
bridge-type load-cell sensor, with voltage output directly
proportional to the weight placed on it. A typical load-cell bridge
is illustrated in Figure 1; it is a 4-resistor bridge circuit with at
least two variable arms, where the resistance change with weight
applied creates a differential voltage at a common-mode level of
2.5 V (one-half the supply voltage). A typical bridge will have
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