綜合電路知識(pdf 43頁)
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- 工藝技術
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- 110 KB
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- 相關資料:
- 電路知識
綜合電路知識(pdf 43頁)內容簡介
1 Scope …………..... 1
2 Normative reference(s) ……............. 1
3 Term(s) and definition(s) …….......... 1
4 Symbols (and abbreviated terms)…………..... 2
5 Protocol activation of PICC Type A…………... 4
5.1 Request for answer to select ……... 6
5.2 Answer to select ……...................... 6
5.2.1 Structure of the bytes…….............. 7
5.2.2 Length byte…….............................. 7
5.2.3 Format byte…….............................. 7
5.2.4 Interface byte TA(1) ……................. 8
5.2.5 Interface byte TB(1) ……................. 8
5.2.6 Interface byte TC(1) ……................. 9
5.2.7 Historical bytes……........................ 9
5.3 Protocol and parameter selection request ……................................. 10
5.3.1 Start byte……................................ 10
5.3.2 Parameter 0……............................ 11
5.3.3 Parameter 1……............................ 11
5.4 Protocol and parameter selection response …….............................. 11
5.5 Activation frame waiting time …… 12
5.6 Error detection and recovery ……. 12
5.6.1 Handling of RATS and ATS…….... 12
5.6.2 Handling of PPS request and PPS response……....... 12
5.6.3 Handling of the CID during activation…………....... 13
6 Protocol activation of PICC Type B ………… 14
7 Half-duplex block transmission protocol …………. 15
7.1 Block format……........................... 15
7.1.1 Prologue field……......................... 15
7.1.2 Information field……..................... 18
7.1.3 Epilogue field……......................... 18
7.2 Frame waiting time ……................ 19
7.3 Frame waiting time extension …… 19
7.4 Power level indication ……............ 20
7.5 Protocol operation……................. 20
7.5.1 Multi-Activation……...................... 21
7.5.2 Chaining……........... 21
7.5.3 Block numbering rules ……........... 22
7.5.4 Block handling rules…….............. 22
7.5.5 Error detection and recovery ……. 23
8 Protocol deactivation of PICC Type A and Type B……..................... 25
8.1 Deactivation frame waiting time…………...... 25
8.2 Error detection and recovery ……. 25
Annex A (informative) Multi-Activation example…………... 26
Annex B (informative) Protocol scenarios…………... 27
B.1 Notation………… 27
B.2 Error-free operation……............... 27
B.2.1 Exchange of I-blocks……............. 27
B.2.2 Request for waiting time extension ………… 28
ISO/IEC FDIS 14443-4:2000(E)
iv ? ISO/IEC 2000 – All rights reserved
B.2.3 DESELECT ……............................. 28
B.2.4 Chaining……................................. 28
B.3 Error handling……........................ 29
B.3.1 Exchange of I-blocks……............. 29
B.3.2 Request for waiting time extension ………… 30
B.3.3 DESELECT ……............................. 32
B.3.4 Chaining……............ 33
Annex C (informative) Block and frame coding overview……....................... 36
..............................
2 Normative reference(s) ……............. 1
3 Term(s) and definition(s) …….......... 1
4 Symbols (and abbreviated terms)…………..... 2
5 Protocol activation of PICC Type A…………... 4
5.1 Request for answer to select ……... 6
5.2 Answer to select ……...................... 6
5.2.1 Structure of the bytes…….............. 7
5.2.2 Length byte…….............................. 7
5.2.3 Format byte…….............................. 7
5.2.4 Interface byte TA(1) ……................. 8
5.2.5 Interface byte TB(1) ……................. 8
5.2.6 Interface byte TC(1) ……................. 9
5.2.7 Historical bytes……........................ 9
5.3 Protocol and parameter selection request ……................................. 10
5.3.1 Start byte……................................ 10
5.3.2 Parameter 0……............................ 11
5.3.3 Parameter 1……............................ 11
5.4 Protocol and parameter selection response …….............................. 11
5.5 Activation frame waiting time …… 12
5.6 Error detection and recovery ……. 12
5.6.1 Handling of RATS and ATS…….... 12
5.6.2 Handling of PPS request and PPS response……....... 12
5.6.3 Handling of the CID during activation…………....... 13
6 Protocol activation of PICC Type B ………… 14
7 Half-duplex block transmission protocol …………. 15
7.1 Block format……........................... 15
7.1.1 Prologue field……......................... 15
7.1.2 Information field……..................... 18
7.1.3 Epilogue field……......................... 18
7.2 Frame waiting time ……................ 19
7.3 Frame waiting time extension …… 19
7.4 Power level indication ……............ 20
7.5 Protocol operation……................. 20
7.5.1 Multi-Activation……...................... 21
7.5.2 Chaining……........... 21
7.5.3 Block numbering rules ……........... 22
7.5.4 Block handling rules…….............. 22
7.5.5 Error detection and recovery ……. 23
8 Protocol deactivation of PICC Type A and Type B……..................... 25
8.1 Deactivation frame waiting time…………...... 25
8.2 Error detection and recovery ……. 25
Annex A (informative) Multi-Activation example…………... 26
Annex B (informative) Protocol scenarios…………... 27
B.1 Notation………… 27
B.2 Error-free operation……............... 27
B.2.1 Exchange of I-blocks……............. 27
B.2.2 Request for waiting time extension ………… 28
ISO/IEC FDIS 14443-4:2000(E)
iv ? ISO/IEC 2000 – All rights reserved
B.2.3 DESELECT ……............................. 28
B.2.4 Chaining……................................. 28
B.3 Error handling……........................ 29
B.3.1 Exchange of I-blocks……............. 29
B.3.2 Request for waiting time extension ………… 30
B.3.3 DESELECT ……............................. 32
B.3.4 Chaining……............ 33
Annex C (informative) Block and frame coding overview……....................... 36
..............................
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